Texas Instruments has released the AWR2544, a single-chip 76-81GHz FMCW Radar SoC, marking the industry’s first design for satellite radar architectures. In satellite configurations, the radar sensor outputs semi-processed data to a central processor, enabling ADAS decision-making through sensor fusion algorithms. This utilization of 360-degree sensor coverage aims to enhance vehicle safety to higher levels.
This innovation is anticipated to contribute to improved sensor fusion and decision-making in Advanced Driver Assistance Systems (ADAS), potentially enhancing levels of autonomy in the automotive industry.
The AWR2544 stands out as the inaugural single-chip radar sensor in the industry to feature launch-on-package (LOP) technology. This innovative LOP technology plays a important role in minimizing the sensor’s size by up to 30%, achieved through the mounting of a 3D waveguide antenna on the reverse side of the printed circuit board. Additionally, LOP technology empowers the sensor to achieve ranges surpassing 200m with just a single chip.
ADAS are systems designed to assist drivers in the driving process and provide safer and more efficient driving. They use various sensors and technologies to gather information about the vehicle’s surroundings and make intelligent decisions to enhance safety and driving comfort.
In this context, satellite architectures are being employed to improve the intelligence of ADAS for higher levels of vehicle autonomy. Satellite architectures involve the use of communication and data exchange with satellites in orbit around the Earth.
In this scenario, a car equipped with the AWR2544 radar sensor utilizes Advanced Driver Assistance Systems (ADAS) that integrate satellite architectures. The radar sensor constantly scans the surroundings for vehicles, pedestrians, and obstacles, providing real-time data to the ADAS system.
The integration with satellites allows the ADAS system to access additional information such as traffic updates, weather conditions, and road closures. With this enhanced intelligence, the ADAS system can make proactive decisions, such as adjusting the vehicle’s speed and trajectory based on real-time satellite data. It can also provide advanced warnings to the driver about potential hazards ahead, contributing to safer and more efficient driving.
The AWR2544 is a single-chip mmWave sensor featuring a comprehensive FMCW transceiver with an Integrated PLL, baseband, and ADC. Capable of transmitting at +12dBm power and maintaining a commendable +13dB RX noise figure, this System-on-Chip (SoC) operates in the 76 to 81GHz (EHF) band. It encompasses radar data processing elements and a rich array of peripherals designed for in-vehicle networking.
Designed with Texas Instruments’ low-power 45nm RFCMOS process, the AWR2544 offers unparalleled integration in a compact form factor and with a minimal Bill of Materials (BOM). Its additional Launch on Package (LOP) antenna feature facilitates direct attachment of antennas onto the package. Primarily crafted for low-power, self-monitored, and ultra-accurate radar systems in the automotive sector, the AWR2544 provides reliability.
Employing RFCMOS process enables the monolithic implementation of a 4 TX, 4 RX system with an integrated PLL, VCO, mixer, and baseband ADC. The Radio Processor Subsystem (RSS) oversees radar front-end configuration, control, and calibration, while the Main Subsystem (MSS) incorporates a user-programmable Arm Cortex-R5F processor for custom control and automotive interface applications.
The hardware accelerator block (HWA 1.5) enhances the MSS by offloading common radar processing tasks such as FFT, scaling, and compression, thereby conserving MIPS on the external processor for custom applications and higher-level post-processing algorithms.
The transmit subsystem features four parallel chains with independent phase and amplitude control, supporting simultaneous or time-multiplexed usage. Binary phase modulation and a 6-bit programmable phase shifter for beamforming control on a per chirp basis are supported, along with programmable backoff for system optimization.
The receive subsystem comprises four parallel channels, each consisting of an LNA, mixer, IF filtering, ADC conversion, and decimation. All four channels can operate concurrently, with an individual power-down option available for system optimization. The device supports a real-only receiver with configurable cutoff frequencies and bandwidths up to 15 MHz.
For connectivity, the device includes a host interface for 10/100/1000Mbps RGMII/RMII/MII Ethernet, and a 25MHz clock output for Ethernet PHY clocking. Additional interfaces include a serial embedded flash memory interface for loading user applications, up to 4 ADC channels, 1 SPI, 2 UARTs, I2C, GPIOs, and 3 EPWMs. Clock source options include a 40MHz or 50MHz crystal with an internal oscillator, supporting an external oscillator/driven clock upto 40 MHz.
Crucially, the AWR2544 is AEC-Q100 qualified and functionally safety compliant, specifically developed for functional safety applications. Documentation is available to support ISO26262 functional safety system design, ensuring hardware integrity up to ASIL B targets.
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